1. Field of the Invention
The present invention relates to decoders for decoding variable length instructions in an instruction set that allows prefixes. The prefix decoder is useful to supply decoded prefix information to multiple decoders that decode multiple macroinstructions in parallel.
2. Description of Related Art
Computers process information by executing a sequence of instructions, which may be supplied from a computer program written in a particular format and sequence designed to direct the computer to operate a particular sequence of operations. Most computer programs are written in high level languages such as FORTRAN or "C" which are not directly executable by the computer processor. In order to run these high level programs, the program is compiled by a compiler program that translates the higher level instructions into macroinstructions having a format that can be decoded and executed. The compiled macroinstructions are supplied to a decoder residing within the processor, where each macroinstruction is decoded into one or more micro-operations which are executable by execution units with in the microprocessor.
The format of the macroinstructions is defined by the instruction set for which the microprocessor is designed. Certain widely used instruction sets, such as the INTEL instruction set used in INTEL microprocessors including the 8086, 80286, i386.TM., i486.TM. and the Pentium.TM. microprocessors, have a complex format that has been developed over many years. Once a format rule is established, it is often continued in subsequent microprocessors to maintain compatibility with software written for earlier microprocessor. In the INTEL format, the macroinstruction must always include at least one opcode byte. It may also include one or more prefix bytes preceding the opcode byte, and one or more operand and data bytes following the opcode byte. In other words, the number and even the existence of prefix bytes and operand and other data bytes is unknown with any certainty. The length of an instruction is variable: the number of bytes in a macroinstruction ranges from one to fifteen. The variations in length create a problem in decoding a stream of macroinstructions, because the datapath to the decoder must be able to select the proper bytes, and supply them to a decoder.
Because the prefix affects interpretation of the following opcode and operands and other data bytes, the prefix has conventionally been decoded before any other decoding operations. In order to decode variable length instructions that may include prefixes, prior decoders include a circuit to first detect the presence of a prefix, and to decode that prefix if detected. Typically, one or more cycles will be required just to decode a prefix. It would be an advantage to provide a decoder that decodes prefixes without any clock penalty, and that can provide the decoder prefix information simultaneously with steering instruction to a decoder. Such a prefix decoder would be particularly useful for parallel decoders that receive and decode multiple instructions in parallel, in order to avoid multiple clock penalties for detecting and decoding prefixes.